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When does wait time from DREQ assert the start of DMAC in external mode?

Latest Updated:03/25/2009

Question:

When does waiting time from DREQ assert to the start of DMAC grow in the external request mode?

Answer:

Waiting time until DMAC is started is three cycle and the waiting time until ending the sequence of the execution. The following cases are the cases that waiting time until ending the sequence during the execution of CPU becomes long.

(1)When accessing the device with a slow access

For instance, the access time quadruples when 32 bits are accessed to an external device in 8 bits data bus width.

(2) When either DMAC or DTC is activated.

It is necessary to wait until completing the forwarding other DMAC or DTC.

(3) When in the middle of interrupt exception handling

It takes 5+m1+m2+m3 cycle for interrupt exception handling. Please refer to the chapter of the interrupt controller of the hardware manual for details.

(4) When in the middle of the execution of RTE instruction

It takes 4 cycles for shortest.

In the case of the RTE instruction, the value of PC and SR returns from the stack. However, in the case that the stack memory is an external memory, it takes more time.

(5) When in the middle of TAS instruction

It takes four cycles for the shortest.

Although the reading and the writing are done to the memory in the TAS instruction and it takes more time when this memory is an external memory.

(6) When in the middle of TRAPA instruction.

It takes eight cycles for the shortest.

In the TRAPA instruction, the value of PC and SR is taken shelter to the stack, and the vector read is done.

If either the stack memory or vector memory is an external memory, it takes more time.

(7) When it is the DRAM refresh.

It takes four cycles for the shortest.

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SH7144, SH7145
SH7065
SH7058
SH7055
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SH7040, SH7041, SH7042, SH7043, SH7044, SH7045
SH7032, SH7034, SH7034B
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