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Why does an interrupt not generated when I set MRB.DISEL in the DTC to 0?

Latest Updated:06/20/2013

Question:

I set MRB.DISEL in the DTC to 0 and operated the DTC in repeat transfer mode, but an interrupt was not generated.

Answer:

In repeat transfer mode, the value of the CRAL register is automatically updated to the value set by the CRAH register just before the transfer counter CRAL register can be set to 00h.
Therefore, the transfer counter will not be set to 00h.
Consequently, when the MRB.DISEL bit is set to 0 (an interrupt request to the CPU is generated when specified data transfer is completed), an interrupt request to the CPU is not generated.
Suitable Products
RX62N, RX621
RX62T
RX610
RX62G
RX630
RX63N, RX631
RX63T
RX210
RX220
RX110
RX111