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(RX62N, RX62) What are the endian specifications for RX?

Latest Updated:06/26/2013

Question:

What are the endian specifications for RX?

Answer:

For the RX CPU, instructions are always little endian, and the RX assembler generates code in little endian. Both big and little endian are supported for the treatment of data, and the endian is switched by changing the setting on a mode pin (MDE) at the time of a power-on reset.
For more information, please refer to the "Endian" section in the "CPU" chapter of the hardware manual.
For information regarding the endian selecting pin, please refer to the explanation of the MDE pin and the explanation of the MDE status flag in the mode monitor register (MDMONR) in the "Operating Modes" chapter of the hardware manual.
Treatment of data in the external bus area is set using the endian mode bit (EMODE). An endian mode can be specified for each of eight (CS0 to CS7) areas.
For more information, please refer to the "Endian and Data Alignment" and "Limitation on Placement of Data for String-Manipulation Instructions" sections in the "Buses" chapter of the hardware manual, and information on the endian mode bit (EMODE) in the CSi control register (CSiCNT).
For DTC transfer data, allocate according to the endian of the area.
For more information, please refer to the "Allocating Transfer Data and DTC Vector Table" and "Allocating Transfer Data" sections in the "Data Transfer Controller (DTC)" chapter of the hardware manual.
For the external bus area, data allocation of each of the eight areas (CS0 to CS7) and each SDRAM area (SDCS) is set using the endian mode bit (EMODE) of the CSn control register (CSnCR) (n = 0 to 7) and the endian mode bit (EMODE) of the SDC mode register (SDCMOD).
For details, see "Endian and Data Alignment", "Restrictions on RMPA and String-Manipulation Instructions", and the endian mode bit (EMODE) of the CSi control register (CSiCNT) in the "Buses" chapter of the user's manual: hardware.

Suitable Products
RX62N, RX621