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Renesas Singapore - Knowledgebase

uPD784216A: channels 0 & 1 set in 3-wire I/O; serial clock is incorrect

Latest Updated:12/01/2011


[These contents are common to the 78K/0 Series, 78K/0S Series, and 78421X Subseries.]
When using a serial channel in these microcontrollers, port settings are required.
Serial channels and I/O ports are shared as alternate functions.
When executing serial communication, port mode and output latch data must be set.
Regarding signals that also serve as output signals in particular, it is necessary to set the port to the output mode and set the data determined for the port output latch (which depends on the device and signal).
If these settings are not performed, the transmission end interrupt is output even though the data has not been sent.

Case 1 :
In the uPD784216A, serial channels 0 and 1 are set to the 3-wire serial I/O operation mode, but the serial clock is not output correctly.


When using the internal clock for the serial clock, ASCK2 (pin 39) can be used as a port.
Suitable Products
RL78 Family
78K Family