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What is the allowable baud rate error in UART reception? How is this error calculated?

Latest Updated:04/01/2006

Question:

What is the allowable baud rate error in UART reception? How is this error calculated?

Answer:

The allowable baud rate error is determined by where the stop bit position shifts to when shifts in the sampling position due to the baud rate error have accumulated after sampling was started at the center of the bit.

Theoretically (when there is no delay of start bit detection and setup and hold time is not required for sampling), the margin at the start bit position is 50% (i.e., a 50% shift either side of the center is acceptable).
The allowable baud rate error is calculated by dividing this by the number of bits until the stop bit.



Actually, however, it is necessary to add sampling cycles or data sampling setup and hold time, so the margin drops from 50% to 40%.
This is then divided by the bit length to determine the allowable baud rate error. (The extent to which the margin decreases differs depending on the device.)
The value thus obtained becomes the relative allowable error of the transmission and reception sides.

Note, however, that these values apply to an ideal reception signal waveform.
In reality, the reception waveform is distorted by effects from the transmission path.
In this case, changes in the signal in the vicinity of the level at which the device judges the start bit become dull and the device becomes vulnerable to effects from noise, leading to variations in the judgment timing.
Consequently, the 40-odd percent margin at the start bit position becomes even smaller, and the allowable baud rate error is reduced by this amount.
Therefore, if the allowable baud rate error is estimated at quite a large value, a malfunction may occur.

Suitable Products
RL78 Family
78K Family