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r_cgc Module Guide Resources

Last Updated:03/09/2018


Where can I find the references to module guide resources for the Clock Generation Control HAL module on r_cgc?


Information on the module guide itself and the associated resources and known issues are available here.


The CGC HAL module is a high-level API for clock-control applications and is implemented on r_cgc. The CGC HAL module configures and controls the clock-control functions of a Synergy MCU using the clock-control peripheral. Since every project requires a clock function, the CGC HAL module is added to a project by default. (The module is configured in the ISDE.) A user-defined callback can be created to signal when the main oscillator has stopped.

The CAN HAL module supports the following features:

  • Select the system clock source
    • HOCO, MOCO, LOCO, Main Clock, PLL, Sub-Oscillator
  • Configure internal clocks and turn them on or off
  • Configure the output clocks
  • Set up the Oscillation Stop Detection feature
  • Set up clock divisors on each of the up to six clock domains
  • Some Synergy MCUs also support controllable external clock outputs, which may have independent divisors

Module Guide

The CGC  HAL module guide is targeted for SSP 1.2.0 and above and the SK-S7G2 Kit.

The CGC  HAL module guide describes what the module does, how to add it to your project, how to configure it, the associated APIs and provides an application project with a code walk through so you can quickly learn how to use the CGC HAL module in your own design. We recommend that you have the SSP ISDE open and inspect the module stack, configuration information and code while reading over the application project description.

The most recent versions of the CGC HAL module guide application note, application project and import guide are available here

Module Guide Errata

Section 3.3.1: Changes to Operational Notes- add note and bullet point between Figures 4 and 5.

Note: In SSP 1.4.0 and later the Oscillator Stop Detect property is set to default as Enabled. Previous versions of SSP set the default to Disabled.

  • If the Configure Subclock Drive on Reset is set to Disabled, then the subclock will not be configured at startup. In order to configure the subclock the user must create a definition for a weakly linked function, R_BSP_WarmStart(). In this function, if the argument is "BSP_WARM_START_POST_C", the user can call the API R_CGC_ClockStart() to start the subclock.

Module Guide Resources

  • No additional resources are currently available.

Know Issues

  • For all known issues refer to the most recent SSP release notes for known issues located here.
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