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Can the RDY signal be used under register conditions?

Latest Updated:03/15/2012

Question:

The manual says "To use the RDY signal, set the corresponding CS3W to CS0W bit to "0" (with wait state).", but can the RDY signal be used under the following register conditions?:
- PM17 bit of the PM1 Register is "0" (no-wait)
- CSi bit (i=0 to 3) of the CSR Register is "1" (chip select output enabled) and CSiW bit is "0" (with wait)

Answer:

Yes, the RDY signal can be used in the CSi area where a wait is set by setting CSiW bit to "0". PM17 bit sets a wait to the internal ROM and RAM.
Suitable Products
M16C/62A
M16C/62A(M16C/62T)
M16C/62M
M16C/62N
M16C/62N(M3062GF8NFP, M3062GF8NGP)
M16C/62P
M16C/63
M16C/64A
M16C/64C
M16C/65
M16C/65C
M16C/6C
M16C/6N4, M16C/6N5
M16C/6NK, M16C/6NL, M16C/6NM, M16C/6NN
M16C/30P